7 Commits

Author	SHA1	Message	Date
Andis Zīle	f1edc6e15a	Changed logic	2024-04-11 23:03:33 +03:00
Andis Zīle	a05c53401f	Saved work	2024-04-10 22:44:02 +03:00
Andis Zīle	8bac1f4787	Finished const voltage output	2024-04-10 21:04:31 +03:00
Andis Zīle	4adcb7eba9	saved work	2024-04-10 17:53:54 +03:00
Andis Zīle	f320bfefb7	Changes	2024-04-10 15:46:26 +03:00
Andis Zīle	c50b3d90bf	board abstraction	2024-04-08 19:40:48 +03:00
Andis Zīle	dd4ff43515	Prepared for Cpp version	2024-03-12 21:27:25 +02:00