258 lines
6.8 KiB
C++
258 lines
6.8 KiB
C++
/**** Includes ****/
|
|
#include "../utils/utils.h"
|
|
#include "memory.h"
|
|
|
|
using namespace dccd;
|
|
|
|
/**** Private definitions ****/
|
|
/**** Private constants ****/
|
|
static uint16_t static_cfg_addr_offset = 0x0000; //0-127
|
|
static uint16_t dynamic_cgf_addr_offset = 0x0080; //128+
|
|
|
|
/**** Private variables ****/
|
|
/**** Private function declarations ****/
|
|
/**** Public function definitions ****/
|
|
dccd::Memory::Memory(void)
|
|
{
|
|
return;
|
|
}
|
|
|
|
dccd::Memory::~Memory(void)
|
|
{
|
|
return;
|
|
}
|
|
|
|
void dccd::Memory::init(dccd::DccdHw* dccd_hw)
|
|
{
|
|
this->hardware = dccd_hw;
|
|
this->read_from_nvmem();
|
|
}
|
|
|
|
void dccd::Memory::update(void)
|
|
{
|
|
uint16_t addr = dynamic_cgf_addr_offset;
|
|
|
|
if(this->dynamic_cfg.btn_force != this->dyn_cfg_shadow.btn_force)
|
|
{
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dynamic_cfg.btn_force);
|
|
this->dyn_cfg_shadow.btn_force = this->dynamic_cfg.btn_force;
|
|
};
|
|
addr++;
|
|
|
|
if(this->dynamic_cfg.tps_mode != this->dyn_cfg_shadow.tps_mode)
|
|
{
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dynamic_cfg.tps_mode);
|
|
this->dyn_cfg_shadow.tps_mode = this->dynamic_cfg.tps_mode;
|
|
};
|
|
addr++;
|
|
|
|
if(this->dynamic_cfg.hbrake_mode != this->dyn_cfg_shadow.hbrake_mode)
|
|
{
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dynamic_cfg.hbrake_mode);
|
|
this->dyn_cfg_shadow.hbrake_mode = this->dynamic_cfg.hbrake_mode;
|
|
};
|
|
addr++;
|
|
|
|
if(this->dynamic_cfg.brakes_mode != this->dyn_cfg_shadow.brakes_mode)
|
|
{
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dynamic_cfg.brakes_mode);
|
|
this->dyn_cfg_shadow.brakes_mode = this->dynamic_cfg.brakes_mode;
|
|
};
|
|
addr++;
|
|
}
|
|
|
|
void dccd::Memory::read_static(staticmem_t* cfg_out)
|
|
{
|
|
uint16_t addr = static_cfg_addr_offset;
|
|
|
|
cfg_out->is_nvmem_cfg = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->inp_mode = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->hbrake_t1 = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->hbrake_t2 = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->hbrake_t3 = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->hbrake_dbnc = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->brakes_dnbc = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->tps_en = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->tps_on_th = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->tps_off_th = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->tps_timeout = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->tps_force_1 = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->tps_force_2 = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->tps_force_3 = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->hbrake_force = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->brakes_open_force = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->brakes_lock_force = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->coil_lock_current = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->coil_ccm_resistance = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->coil_cvm_resistance = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->coil_protection_dis = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->coil_cc_mode_en = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->dsp_brigth_pwm = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
cfg_out->dsp_dimm_pwm = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
}
|
|
|
|
void dccd::Memory::write_static(staticmem_t* cfg_in)
|
|
{
|
|
uint16_t addr = static_cfg_addr_offset;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->is_nvmem_cfg);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->inp_mode);;
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->hbrake_t1);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->hbrake_t2);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->hbrake_t3);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->is_nvmem_cfg);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->brakes_dnbc);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->tps_en);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->tps_on_th);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->tps_off_th);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->tps_timeout);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->tps_force_1);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->tps_force_2);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->tps_force_3);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->hbrake_force);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->brakes_open_force);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->brakes_lock_force);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->coil_lock_current);;
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->coil_ccm_resistance);;
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->coil_cvm_resistance);;
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->coil_protection_dis);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->coil_cc_mode_en);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->dsp_brigth_pwm);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, cfg_in->dsp_dimm_pwm);
|
|
addr++;
|
|
}
|
|
|
|
|
|
/**** Private function definitions ***/
|
|
void dccd::Memory::read_from_nvmem(void)
|
|
{
|
|
uint16_t addr = dynamic_cgf_addr_offset;
|
|
|
|
this->dyn_cfg_shadow.btn_force = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
this->dyn_cfg_shadow.tps_mode = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
this->dyn_cfg_shadow.hbrake_mode = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
this->dyn_cfg_shadow.brakes_mode = this->hardware->board_hw.nvmem.read_8b(addr);
|
|
addr++;
|
|
|
|
this->dynamic_cfg.btn_force = this->dyn_cfg_shadow.btn_force;
|
|
this->dynamic_cfg.tps_mode = this->dyn_cfg_shadow.tps_mode;
|
|
this->dynamic_cfg.hbrake_mode = this->dyn_cfg_shadow.hbrake_mode;
|
|
this->dynamic_cfg.brakes_mode = this->dyn_cfg_shadow.brakes_mode;
|
|
}
|
|
|
|
void dccd::Memory::write_to_nvmem(void)
|
|
{
|
|
uint16_t addr = dynamic_cgf_addr_offset;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dyn_cfg_shadow.btn_force);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dyn_cfg_shadow.tps_mode);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dyn_cfg_shadow.hbrake_mode);
|
|
addr++;
|
|
|
|
this->hardware->board_hw.nvmem.write_8b(addr, this->dyn_cfg_shadow.brakes_mode);
|
|
addr++;
|
|
}
|